1. Field of the Invention
The present Invention relates to a display device and a method for driving the same. More particularly, the present invention relates to a display device including a thin film transistor (hereinafter referred to as TFT) as a switching element for each pixel, such as an active matrix liquid crystal display device, and a method for driving the same.
2. Description of the Related Art
Conventionally, liquid crystal display (hereinafter referred to as LCD) devices have been widely used for televisions, graphic displays, etc. Of the LCD devices, an active matrix LCD device has an excellent display image without crosstalk between adjacent pixels even when the number of pixels is increased. For this reason, the active matrix LCD device has been widely used as a display for digital systems such as a computer.
Such an active matrix LCD device includes an LCD panel 10 and a driving circuit 356, for example, as shown in FIG. 11.
The LCD panel 10 includes a pair of electrode substrates having a liquid crystal material therebetween. A polarizer is attached on the outer surface of each electrode substrate. One of the electrode substrates is a TFT array substrate. The other electrode substrate is a counter substrate.
The TFT array substrate is made of a transparent, insulative substrate such as glass. On the TFT array substrate, a plurality of signal lines S(1), S(2), . . . , S(i), . . . , S(N), and a plurality of scanning lines G(1), G(2), . . . , G(j), . . . , G(M) are provided in a matrix. A switching element 102, such as TFT, is provided at each intersection of a signal line 201 and a scanning line 301. The switching element 102 is connected to a pixel electrode 103. An alignment film is provided on substantially an entire surface of the TFT array substrate, covering those lines and elements.
The counter substrate is made of a transparent, insulative substrate such as glass, as is the TFT array substrate. A counter electrode 105 and an alignment film are successively provided on an entire surface of the counter substrate. A display cell (pixel) 1 is a portion of a liquid crystal layer sandwiched between the pixel electrode 103 and the counter electrode 105. A matrix of such pixels is provided in the LCD panel 10.
The driving circuit 356 includes a write circuit 250 and a timing control circuit 400. The write circuit 250 includes a scanning line driving circuit 300 connected to the scanning lines 301, a signal line driving circuit 200 connected to the signal lines 201, and a counter electrode driving circuit (not shown) connected to the counter electrodes 105. The timing control circuit 400 is connected to the signal line driving circuit 200 and the scanning line driving circuit 300.
The scanning line driving circuit (gate driver) 300, for example, includes a shift register and a select switch. The shift register includes M flip-flops in cascade connection. The select switch is switched in response to an output from each flip-flop. A gate scanning voltage Vgh, which is sufficient to switch the TFT 102 to the ON state, or a gate holding voltage Vg1, which is sufficient to switch the TFT 102 to the OFF state, is input to the scanning line driving circuit 300. The voltage Vgh or Vg1 is successively propagated through the flip-flops while being output from the respective select switches. In response to the voltage Vgh, the select switch outputs the voltage Vgh to the scanning line 301 in a scanning period of time (TH) to switch the TFT 102 to the ON state. In response to the voltage Vg1, the select switch outputs the voltage Vg1 to the scanning line 301 to switch the TFT 102 to the OFF state. Timing of the output is controlled by the timing control circuit 400.
Such an operation writes into a display cell (pixel) 1 a video signal output onto the TFT via the signal line 201 from the signal line driving circuit 200.
In this way, the video signal is written into the pixel 1 via the TFT 102 in the scanning period of time (which is typically equal to a horizontal synchronization period, e.g., several tens of micro seconds). Thereafter, the voltage is held in the pixel 1 until a next write operation starts, i.e., a vertical synchronization period (a frame period). This allows the video signal to be displayed on the display device.
Recently, LCD devices have been commonly used for displaying not only still pictures but also moving pictures, owing to high-performance computers, etc. Further, large-size liquid crystal televisions have come into practice. Accordingly, high-quality display performance is required for the LCD devices.
Unfortunately, conventional LCD devices do not have satisfactory display performance for moving pictures.
For example, consider the following case. Referring to FIG. 12A, a white quadrangle is displayed in the black background, and the quadrangle is moved from the left to the right. In the conventional LCD devices. the contour of the moving quadrangle is blurred as shown in FIG. 12B.
This is caused because the conventional LCD devices have a response time of as great as 50 ms. Such devices are not suitable for visual devices dealing mainly with moving pictures, since the moving pictures have unclear contours, resulting in poor picture quality.
Picture quality may be evaluated on the following two scales: (1) a transit response time which is a period of time during which a display changes from white to black or from black to white, i.e., a change in luminance from 10% to 90% or 90% to 10%; and (2) a human perceptive response time which is a period of time during which a human perceives a change in a luminance level from 0% to 100% or 100% to 0%. For display devices exhibiting moving pictures, although the transit response time (1) is conventionally used, the human perceptive response time has more important meaning. The reason is that even when the luminance level is changed from 10% to 90% in a short time, if it takes a long time to change 90% to 100%, the blurred contour of a moving picture in perceived as shown in FIG. 12B.
For convenience of explanation, a response time which it takes for a human to perceive a change in a luminance level from 0% to 100% or 100% to 0% is defined as Td_LCD (black display to white display) or Tr_LCD (white display to black display), respectively. When Tr_LCD is not conditionally separated from Td_LCD, the change in a luminance level is defined as T_LCD (from black display to white display or from white display to black display). The response time of a display device which is required for non-blurred moving picture display is not strictly defined, since it significantly varies depending on the size of a moving picture and the background or among individuals. In the present invention, it is assumed that a moving picture response limit time Tmov is equal to about 20 ms. The moving picture response limit time Tmov is applied to the case of the luminance change from black display to white display as well an the case of the luminance change from white display to black display.
The response time of a liquid crystal material used in the above-described LCD device is defined on the following scales: (1) Tr_LC which is a period of time which is it takes a liquid crystal molecule to change the orientation toward the vertical direction due to an applied electric field; and (2) Td_LC which is a period of time which it takes a liquid crystal molecule to return to the original state due to an intermolecular force in the absence of an applied electric field. Tr_LC and Td_LC are given by
Trxe2x80x94LC=xcex7d2/{(|∈pxe2x88x92∈s|)Vxe2x88x92Kxcfx802}xe2x80x83xe2x80x83(1)
Tdxe2x80x94LC=xcex7d2/Kxcfx802xe2x80x83xe2x80x83(2)
where K=K1+(K3xe2x88x922xc3x97K2)/4 where K1, K2, and K3 are the divergent, torsional, and flexural elastic coefficients of the liquid crystal material, respectively; ∈s is the dielectric constant in the major axis direction of a liquid crystal molecule; ∈p is the dielectric constant in the minor axis direction of a liquid crystal molecule; xcex7 is the tortional viscosity of a liquid crystal molecule; d is the thickness of a liquid crystal display cell (cell gap); and V is the applied voltage.
Liquid crystal materials themselves have been improved so that Tr_LC is substantially equal to Td_LC and Tr_LC and Td_LC can be achieved to be as small as 5 ms. This response speed is sufficiently fast as compared with the above-described moving picture response limit time Tmov (=20 ms). Despite such a fast response speed of the liquid crystal material itself, the display response time (Tr_LCD) of an LCD device is as long as 50 ms. The reason will be described below.
FIGS. 13A and 13B are diagrams illustrating a liquid crystal display cell. FIG. 13A shows a white display state of the cell in the presence of an applied voltage having a white level. FIG. 13B shows a black display state of the call in the presence of an applied voltage having a black level.
The liquid crystal display cell of the LCD device displays a video signal when a voltage is applied across the cell so that the alignment of liquid crystal molecules therein is changed. The liquid crystal molecule has a dielectric anisotropy property (the dielectric constant ∈s in the major axis direction is different from the dielectric constant ∈p in the minor axis direction). For this reason, the capacitance of the LCD cell varies depending on an applied voltage. The capacitance Clc (white) of the LCD cell upon the white display and the capacitance Clc (black) of the LCD cell upon the black display are given by
Clc(white)={(∈0xc3x97∈sw)/d}xc3x97Sxe2x80x83xe2x80x83(3)
Clc(black)={(∈0xc3x97∈pb)/d}xc3x97Sxe2x80x83xe2x80x83(4)
where ∈sw is the relative dielectric constant upon the white display, i.e., in the presence of a white level voltage; ∈pb is the relative dielectric constant upon the black display, i.e., in the presence of a black level voltage; ∈0 is the vacuum dielectric constant; S is the electrode area of the LCD cell; and d is the distance between the electrodes (cell gap).
FIG. 14 shows a voltage-dependent capacitance characteristic of the LCD cell where the capacitance of the LCD cell upon the white display, i.e., in the presence of a white level voltage is defined as 1. Since ∈sw less than ∈pb is established, the capacitance of the LCD cell upon the black display is larger than the capacitance of the LCD cell upon the white display, as shown in FIG. 14. The ratio is about two to one, depending on what material is used.
FIG. 15 is a diagram showing the relationship between a voltage change and a display response time (Tr_LCD2) with respect to an arbitrary LCD cell of an LCD device when the white display is switched to the black display. The liquid crystal is typically driven by an alternating current from a reliability point of view. Accordingly, a holding voltage of the LCD cell should be driven in such a way to change the polarity of the holding voltage in the frame-by-frame basis. For sake of simplicity, a waveform obtained by driving the liquid crystal by a direct current is herein illustrated.
A synchronizing signal is supplied to the display device along with a video signal. A vertical synchronizing signal which determines one frame cycle is included in the synchronizing signal. A scanning line voltage is a scanning signal output onto the scanning line G(j) from the scanning driving circuit 300 (FIG. 11). A signal line applied voltage is a video signal output onto the signal line S(i) from the signal line driving circuit 200. The LCD cell holding voltage is shown by a voltage waveform of one LCD cell provided at the intersection of the scanning line G(j) and the signal line S(i).
During time periods T1 and T2, a white level voltage is applied across the LCD cell so that the white display state is held. In this case, the capacitance of the LCD cell is Clc(white). During a time period T3, the TFT is switched to the ON state by the scanning line voltage, and the black level voltage applied on the scanning line is supplied to the LCD cell to perform a first write operation. The time period T3 is equal to one horizontal synchronization period, i.e., tens of micro seconds. As described above, the liquid crystal material itself has a response time of about 5 ms. The liquid crystal material does not respond during the time period T3 (tens of micro seconds). Although the black level voltage is applied across the LCD cell, the capacitance of the LCD cell remains Clc(white). The electric charge of the LCD cell is Qlc=(black level voltage)xc3x97Clc(white). Thereafter, during a time period T4, the TFT is switched to the OFF state. The LCD call is separated from the signal line, establishing the law of conservation of electric charge. During the time period T4, the alignment of the liquid crystal is gradually changed in accordance with the holding voltage applied across the liquid crystal. This leads to an increase in the capacitance of the LCD cell. In this case, the TFT is in the OFF state and therefore the electric charge of the LCD cell is conserved, so that the voltage of the LCD cell is decreased. As a result, despite the applied black level voltage, the voltage of the LCD cell is decreased during the time period T4, so that the LCD cell reaches only an intermediate luminance. In the next frame, at the timing of T5 the black level voltage is applied across the LCD cell again, and a second write operation is performed. At the time of the second write operation, despite the black level voltage applied across the LCD cell, the capacitance of the LCD cell is not switched to Clc(black), similar to the first write operation. For this reason, the voltage is decreased during a holding period of time T6. The above-described write operation is repeated until the LCD cell reaches the black level. In FIG. 15, for example, the black display is obtained by a third write operation in which the black level voltage is supplied again during a time period T7.
In this case, a write operation cycle of the LCD cell is equal to a frame cycle determined by the vertical synchronizing signal. Therefore, even when the black level voltage is supplied to the LCD cell in the white display state, the black display state is not obtained in the one frame cycle. Typically, three frame cycles are required to obtain the black display. A frame frequency is typically about 60 Hz (a frame cycle is equal to about 17 ms). Thus, a time required to obtain the black display is about 17 msxc3x973=51 ms. Therefore, the contour of a displayed image is blurred when a different image, e.g., a moving picture, is displayed for each frame.
The applicant discloses in Japanese Patent No. 1602422 a method for driving an LCD device in which a video signal is stored in a memory; the video signal is alternately supplied to a liquid crystal panel which is divided into upper and lower portions; and thus the write operation cycle is shortened. This prior technique is for the purpose of reducing a flicker of the LCD panel. On the other hand, in the present invention, applicant""s attention has been captured by a change in capacitance of an LCD cell when a black display is switched to a white display or vice versa, which is a property specific to the active matrix driving LCD device. A display in response to a fast moving picture is improved using such a property.
Therefore, an object of the present invention is different from that of the prior technique. In the prior technique, the panel is divided into the upper and lower portions. The upper and lower portions of the panel are alternately driven in the following way. A first scanning line of the upper portion is driven; a first scanning line of the lower portion is then driven; a second scanning line of the upper portion is then driven; a second scanning of the lower portion is then driven; etc. In this way, the cycle of the write operation is shortened. Such a complicated driving method is not adopted in this invention.
Japanese Laid-Open Publication No. 9-265073 discloses a method for driving a nematic liquid crystal in which a voltage is repeatedly applied a number of times across a nematic liquid crystal element such as super twisted nomatic (STN) in order to improve the response speed of the nematic liquid crystal. Such a prior technique leads to a reduction in cycle of the applied voltage, which is the same feature of the present invention. However, in the prior technique, a number of ON operations are integrated. The ON operation is superior to an OFF operation in terms of an operational response, because of the relationship of ON-OFF operations (integral/differential operations), i.e., a time constant waveform has a rapidly rising edge and a slowly falling edge. In this case, an intended voltage is not obtained by a first write operation. On the other hand, even when the intended voltage is obtained in every write operation, there is a problem in that the voltage is decreased in a subsequent holding period of time. The present invention is provided to solve such a problem.
T. Kurita, xe2x80x9cDisplay System for Hold Type Display and Image Quality of Moving Picturesxe2x80x9d (Japanese Liquid Crystal Society First LCD Forum, Aug. 28, 1998), discloses a method for scanning a device using a field frequency two times or more as high as a standard frequency in which image quality of moving pictures can be improved. The present invention and the prior technique have the same feature in that a cycle of write operation is shortened. The prior technique describes that blur is prevented because pixels in a narrow spatial range are integrated by the visual system similar to the shutter effect. On the other hand, in the present invention, our attention has been captured by a change in capacitance of an LCD cell during a holding period of time after the writing of a voltage into the LCD cell, which is a phenomenon specific to the active matrix driving LCD device. Accordingly, the present invention is a technique different from the prior technique.
According to an aspect of the present invention, a device for displaying a video signal which is supplied to the device along with a vertical synchronizing signal, includes a plurality of pixels arranged in a matrix; a switching element connected to each of the plurality of pixels; and a driving circuit for writing the video signal into each of the plurality of pixels via the switching element. The driving circuit writes the video signal to each of the plurality of pixels with a cycle TW1 shorter than one cycle of the vertical synchronizing signal.
In one embodiment of this invention, the driving circuit includes a timing circuit for receiving the vertical synchronizing signal and generating a timing signal having a cycle shorter than one cycle of the vertical synchronizing signal; and a write circuit for receiving the video signal and writing the video signal into each of the plurality of pixels in accordance with the timing signal.
In one embodiment of this invention, the write circuit includes a signal line driving circuit for outputting the video signal to the switching element in accordance with the timing signal; and a scanning line driving circuit for outputting a voltage for switching the switching element to an ON or OFF state in accordance with the timing signal.
In one embodiment of this invention, the device is an active matrix liquid crystal display device. Each of the plurality of pixels has a voltage-dependent capacitance characteristic which requires N iterations of a write operation to each of the plurality of pixels. TW1xc3x97Nxe2x89xa6Tmov is satisfied where Tmov is the response limit time required for displaying a moving image without blur on the device.
According to another aspect of the present invention, a device for displaying a video signal which is supplied to the device along with a vertical synchronizing signal includes a plurality of pixels arranged in a matrix; a switching element connected to each of the plurality of pixel; and a driving circuit for writing the video signal into each of the plurality of pixels via the switching element. The driving circuit includes a switch for switching a write operation cycle for writing the video signal into each of the plurality of pixels. The switch sets the write operation cycle, in accordance with at least one parameter, to one cycle of the vertical synchronizing signal or to a cycle shorter than one cycle of the vertical synchronizing signal.
In one embodiment of this invention, the device is an active matrix liquid crystal display device. Each of the plurality of pixels has a voltage-dependent capacitance characteristic and requires N iterations of a write operation to each of the plurality of pixels. TW1xc3x97Nxe2x89xa6Tmov is satisfied where Tmov is the response limit time required for displaying a moving image without blur on the device.
In one embodiment of this invention, the at least one parameter includes one cycle of the vertical synchronizing signal.
In one embodiment of this invention, the at least one parameter includes the mode control signal input to the device.
In one embodiment of this invention, one cycle of the vertical synchronizing signal is equal to a frame or field cycle of the video signal.
According to still another aspect of the present invention, a method for use in a device for displaying a video signal which is supplied to the device along with a vertical synchronizing signal is provided. The device includes a plurality of pixels arranged in a matrix; a switching element connected to each of the plurality of pixels; and a driving circuit for writing the video signal into each of the plurality of pixels via the switching element. The method includes the steps of: receiving the vertical synchronizing signal; generating a timing signal having a cycle shorter than one cycle of the vertical synchronizing signal; receiving the video signal; and writing the video signal to each of the plurality of pixels in accordance with the timing signal.
In one embodiment of this invention, the writing step includes the steps of: driving a signal line for outputting the video signal to the switching element in accordance with the timing signal; and driving a scanning line for outputting a voltage for switching the switching element to an ON or OFF state in accordance with the timing signal.
In one embodiment of this invention, one cycle of the timing signal is substantially equal to 1/X of one cycle of the vertical synchronizing signal where X is a predetermined coefficient greater than or equal to one.
In one embodiment of this invention, the predetermined coefficient in constant.
In one embodiment of this invention, the predetermined coefficient is variable.
In one embodiment of this invention, one cycle of the timing signal is constant, being independent of the vertical synchronizing signal.
In one embodiment of this invention, one cycle of the vertical synchronizing signal is equal to a frame or field cycle of the video signal.
Hereinafter, functions of the present invention will be described.
In the present invention, an input video signal is written into each LCD cell with a cycle shorter than the cycle of a vertical synchronizing signal. Therefore, the response speed of the LCD cell can be accelerated regardless of the frame frequency of the external input video signal, thereby obtaining satisfactory moving picture display or the like. Further, the input signal may have the same signal cycle as that of the conventional devices, thereby obtaining device compatibility.
The above-described xe2x80x9ccycle of a vertical synchronizing signalxe2x80x9d roughly means a cycle in which a screen of a video signal is switched to another screen. In the case of a non-interlaced signal such am a computer signal, it is equal to a xe2x80x9cframe cyclexe2x80x9d. In the case of an interlaced signal such as a television signal (e.g., a NTSC signal), it is equal to a xe2x80x9cfield cyclexe2x80x9d (2 fields=1 frame).
For example, a black level voltage is written one time via a switching element such as a TFT into a pixel such as an LCD cell which has a voltage-dependent capacitance characteristic. The voltage of the LCD cell decreases during a holding time due to a change in the capacitance of the LCD cell. For this reason, a plurality of write operations are required to hold an intended voltage, resulting in elongation of the response time to obtain the black display. In the present invention, as described below in Examples 1-6, for the purpose of accelerating a display response, a cycle of the write operation is accelerated in such a way as to satisfy TW1xc3x97Nxe2x89xa6Tmov where TW1 is the write operation cycle for each pixel; N is the number of write operations required to hold the intended voltage during the holding time after the video signal is written; and Tmov is the response limit time required to display a moving image without blur.
When the frequency of an external vertical synchronizing signal (frame frequency or field frequency) is high, sufficient moving picture quality may be obtained even if a video signal is written into each pixel with a cycle of the vertical synchronizing signal (frame cycle or fold cycle). Therefore, as described below in Example 5, a write operation may be switched between the following two ways in accordance with the frequency of a vertical synchronizing signal (frame frequency or field frequency): (1) the video signal is written into each pixel with a cycle shorter than one cycle of the vertical synchronizing signal (frame cycle or field cycle); and (2) the video signal is written into each pixel with the same cycle as one cycle of the vertical synchronizing signal (frame cycle or field cycle). Therefore, when suspending the operation that the video signal is written into each pixel with a cycle shorter than one cycle of the vertical synchronizing signal (frame cycle or field cycle), power consumption can be lowered.
Alternatively, as described below in Example 6, the write operation may be switched between the following two ways in accordance with the input mode control signal: (1) the video signal is written into each pixel with a cycle shorter than one cycle of the vertical synchronizing signal (frame cycle or field cycle); and (2) the video signal is written into each pixel with the same cycle as one cycle of the vertical synchronizing signal (frame cycle or field cycle). In this case, operations of circuits having large power consumption, such as a frame memory and a control circuit thereof, are suspended, so that power consumption can be further lowered.
As described above, the video signal is written into each pixel with a cycle shorter than one cycle of the vertical synchronizing signal (frame cycle or field cycle). To this end, as described below in Example 2, the video signal may be written into each pixel with a cycle 1/X times one cycle of the vertical synchronizing signal (frame cycle or field cycle) where X is an arbitrary constant more than one.
Alternatively, the video signal may be written into each pixel with a cycle 1/Y times one cycle of the vertical synchronizing signal (frame cycle or field cycle) where Y is an arbitrary variable parameter more than one. In this case, the write operation of the video signal can be performed with a sufficiently short cycle in accordance with a video signal having various frame cycles.
Alternatively, the video signal may be written into each pixel with a specific cycle Z regardless of the cycle of the vertical synchronizing signal (frame cycle or field cycle). In this case, the display device can be driven with a specific optimal written operation cycle even when the input video signal has various frame cycles.
Thus, the invention described herein makes possible the advantages of providing a display device and a method for driving the display device, which can provide moving picture display having a high quality. This is achieved by preventing a reduction in a response speed which is caused by a voltage-dependent capacitance change of a display cell such as liquid crystal.